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TransEDA Publishes Online Edition of Its Verification Methodology Manual

Popular Verification Guide Available Free-of-Charge on EDAToolsCafe


LOS GATOS, Calif. (U.S.A.) - September 24, 2002 - TransEDA® PLC, the leader in integrated verification solutions for electronic designs, today announced that it has published its popular Verification Methodology Manual book online on the EDAToolsCafe website at http://www.dacafe.com/DACafe/EDATools/BOOKINFO/TransEDA/index.html.

"There is a tremendous demand for education and information on verification methodologies from engineers around the world," said Tom Borgstrom, vice president of marketing at TransEDA. "When we gave away copies of the Manual at DAC 2002, we had to order an extra shipment of the books part way through the show to meet overwhelming demand. Now, through publication of the Manual online, design and verification engineers around the world can easily access its important content."

A Valuable Technical Reference
The online edition of the Verification Methodology Manual is based on the third print edition of the book published earlier this year with over 200 pages of valuable technical content for SoC, ASIC and FPGA design and verification engineers. The book focuses on a coverage directed verification methodology, with introductions to HDL checking strategies, pre-silicon validation methodologies and dynamic property checking. The online edition adds full-color illustrations as well as a hyperlinked table of contents and index for finding information quickly.

About TransEDA
TransEDA PLC (symbol TRA on the London Stock Exchange) develops and markets integrated design verification solutions for electronic field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), and system-on-chip (SoC) designs. The company's verification IP library includes models and properties for advanced microprocessors and standard bus interfaces.

TransEDA's design verification software performs dynamic property checking, code and finite state machine (FSM) coverage analysis, configurable HDL checking, application-specific test automation, and test suite analysis. TransEDA's tier-one customers include 18 of the world's top 20 semiconductor vendors.

For more information, visit www.transeda.com or contact TransEDA at 983 University Avenue, Building C, Los Gatos, Calif. 95032 U.S.A., telephone (408) 335-1300, fax (408) 335-1319, e-mail info@transeda.com.

Note: TransEDA and Verification Navigator are registered trademarks and Foundation Models, VN-Property DX, VN-Check, VN-Control, VN-Cover, VN-Cover Emulator, and VN-Optimize are trademarks of TransEDA. All other trademarks are property of their respective holders.


MEDIA CONTACTS:

TransEDA
Tom Borgstrom
(408) 335-1303
tom.borgstrom@transeda.com

Armstrong Kendall, Inc.
Jen Bernier
(415) 824-1026
jen@akipr.com

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